Two of the most important factors in the development of smaller integrated circuit packages have been the reduction in size of the integrated circuit chips themselves and the miniaturization of the interconnections used to connect those integrated circuits to printed circuit boards. Unfortunately, while the development of smaller integrated circuits has continued to proceed at a relatively rapid rate as circuit density has been improved, the miniaturization of the pin connectors typically used to connect integrated circuits to printed circuit boards has proceeded at a substantially slower pace. Without sufficiently small pin connectors, the number of connections which can be made to a very small integrated circuits (i.e. the pin connector density) is limited.
The problem of limited pin connector density has become compounded as manufacturing techniques allow greater processing capability to be incorporated into IC chips--the increased capability of the circuit typically demanding an increased number of I/O connections. The need for increased pin density is further complicated by the need to keep the interconnection paths and pins as short as possible in order to accommodate the higher speeds at which state-of-the-art high-speed electronics operate.
Traditional pin grid arrays are incapable of meeting the continually increasing I/O requirements of increasingly dense IC packages. In order to be of sufficient strength and rigidity to provide a solid connection to the printed circuit board, the pins must be of a minimum diameter. Further, increased contact density makes it more difficult and more expensive to solder IC circuits or IC sockets to the printed circuit boards.
The limitations on conventional pin arrays have led to greater use of land grid arrays ("LGAs") since LGAs employ contact pads rather than pins. LGAs advantageously permit significant increases in contact point density and reduce or eliminate the problems associated with the pin attachment, along with most of the associated expense.
Numerous methods of attaching LGA packages to printed circuit boards have been developed. Most of these methods rely upon a socket to align the contact pads on the bottom of the LGA integrated circuit package with contact pads on the printed circuit board (PCB). While the socket provides alignment in the X-Y plane of the board, problems can still arise in maintaining good electrical contact between all of the pads on the LGA IC package and all of the corresponding contact pads on the printed circuit board. These problems typically result from minor variations in the contours of the PCB surface and the bottom surface of the integrated circuit package which cause extremely small gaps to be created between corresponding contact pads.
To eliminate the creation of gaps between corresponding contact pads, many LGA assemblies utilize an interconnection array of conductor pins interposed between the LGA IC package and the printed circuit board. The interconnection array typically is fabricated of a compressible conductive material that completely fills the space between the contact pad on the IC package and the contact pad on the PCB when sufficient pressure is applied to the top of the IC package. As the integrated circuit is forced down on the interconnecting array, high spots on the PCB flatten the compressible conductors of the interconnecting array more than low spots on the PCB. Typically, this pressure is permanently maintained by use of a clamping lid, which quite often is a conventional IC heat sink, which sits on top of the integrated circuit package and is held down by screws that pass through into the printed circuit board. While the interconnecting array is typically a separate component sitting inside the LGA IC alignment socket along with the LGA IC, the alignment socket and the interconnecting array may alternatively be a single integrated unit. Additionally, many printed circuit boards will have a backing plate on their reverse side for added strength.
There are numerous problems with present methods of assembling LGA IC packages to printed circuit boards. LGA sockets typically use the edge of the IC package for alignment. By necessity, this requires that the socket be larger in size than the LGA package it is aligning (i.e., the IC package fits within the socket). Therefore, the "footprint" or board space occupied by the IC package and socket is greater than that occupied by the IC package alone. High speed computing systems however are extremely sensitive to PCB space limitations. Among other things, it is critical in such systems to minimize line length in order to minimize signal noise and maximize operating speed. It is therefore essential that the real estate occupied by an LGA IC circuit be the minimum possible, preferably limited to the footprint of the IC package rather than the larger footprint of the socket.
The present methods of connecting LGA IC packages to printed circuit boards are also subject to force tolerance problems associated with the compression of the conductors in the interconnecting array by the LGA package. In many LGA assemblies, the LGA socket and the interconnecting array are one integral component. Such LGA sockets use either a spring to apply a controlled force or the clamping lid/heat sink to press the package into the socket to a fixed point. These LGA sockets are therefore very sensitive to the package thickness. As mentioned previously, the clamping lid/heat sink may be attached to the socket by screws which, when tightened, force the clamping lid/heat sink down onto the LGA package. To align the holes in the socket with those in the board, the clamping lid must also be larger than the IC package. Excess force used to tighten the screws on the clamping lid/heat sink will cause the heat sink to bow around the IC package, possibly damaging the corners of the IC package, or even bowing the IC package.
Another problem related to the attachment of LGA IC packages to printed circuit boards concerns the location of series termination/isolation resistors in selected data lines of the IC. High speed computer printed circuit boards have a system performance requirement of providing electrical isolation between the high speed signal lines in the printed circuit board and the IC component. The use and location of termination/isolation resistors is critical to achieve this electrical isolation. Ideally, isolation resistors should be placed very close to the high speed signal line on the IC package so that there is minimal disruption of the signal integrity. In most systems, isolation/termination resistors are either mounted on the surface of the printed circuit board or buried within the board itself. Adding surface mounted resistors typically does not achieve the isolation desired due to the normal distance of the resistors from the IC package. Surface mounted resistors also use additional critical board space. Adding the buried layer resistors significantly increases the complexity of the printed circuit board and normally requires the addition of vias to the printed circuit board, which may not be feasible in the area needed. Finally, the use of buried resistors has the additional drawback of requiring constant circuit board modification whenever additional or differing isolation resistors are required during laboratory debugging of the computer system.
Thus, a need has arisen for apparatus and methods for minimizing the size and complexity of the devices used to attach land grid array IC packages to printed circuit boards. Furthermore, a need has arisen for apparatus and methods of attaching LGA IC packages of various thicknesses to printed circuit boards without creating force tolerance problems that may damage the IC package or conductors in the alignment socket. Finally, a need has arisen for apparatus and methods of providing series termination/isolation resistors for selected lines of land grid array packages without increasing the complexity of the main printed circuit board and without using any additional board real estate.